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FUJITSU SEMICONDUCTOR DATA SHEET
DS07-12405-2E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89160/160A Series
MB89161/163/165/P165/PV160 MB89161A/163A/165A/W165
s DESCRIPTION
The MB89160 series is a line of the general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers contain a variety of peripheral functions such as an LCD controller/driver, an A/D converter, timers, a serial interface, PWM timers, and external interrupts.
s FEATURES
* * * * * * * * * * * * * * * * * * * F2MC-8L family CPU core Dual-clock control system Maximum memory size: 16-Kbyte ROM, 512-byte RAM (max.) Minimum execution time: 0.95 s/4.2 MHz I/O ports: max. 54 channels 21-bit time-base counter 8/16-bit timer/counter: 2 or 1 channels 8-bit serial I/O: 1 channel External interrupts (wake-up function): Four channels with edge selection plus eight level-interrupt channels 8-bit A/D converter: 8 channels 8-bit PWM timers: 2 channels Watch prescaler (15 bits) LCD controller/driver: 24 segments x 4 commons (max. 96 pixels) LCD driving reference voltage generator and booster (option) Remote control transmission output Buzzer output Power-on reset function (option) Low-power consumption modes (stop, sleep, and watch mode) CMOS technology
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MB89160/160A Series
s PACKAGE
80-pin Plastic SQFP 80-pin Plastic QFP 80-pin Plastic QFP
(FTP-80P-M05)
(FTP-80P-M06)
(FTP-80P-M11)
80-pin Ceramic QFP
80-pin Ceramic MQFP
(FTP-80C-A02)
(MQP-80C-P01)
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MB89160/160A Series
s PRODUCT LINEUP
Part number Parameter
MB89161/ MB89161A*1
MB89163/ MB89163A*1
MB89165/ MB89165A*1
MB89P165 One-time PROM product
MB89W165 EPROM product
MB89PV160 Piggyback/ evaluation product (for development)
Classification
Mass production products (mask ROM products)
ROM size
4 K x 8 bits (internal mask ROM) 128 x 8 bits
8 K x 8 bits (internal mask ROM) 256 x 8 bits
16 K x 8 bits 16 K x 8 bits 32 K x 8 bits (internal mask (internal PROM, programming with (external ROM) ROM) general-purpose EPROM programmer) 512 x 8 bits 136 8 bits 1 to 3 bytes 1, 8,16 bits 0.95 s/4.2 MHz 9 s/4.2 MHz
RAM size CPU functions
Number of instructions: Instruction bit length: Instruction length: Data bit length: Minimum execution time: Interrupt processing time: I/O port (N-ch open-drain): Output ports (N-ch open-drain):
Ports
I/O ports (CMOS): Output ports (CMOS): Total: Timer/counter Serial I/O
8 (6 ports also serve as peripherals, 3 ports are a heavy-current drive type.) 28 (16 ports also serve as segment pins, 2 ports serve as booster capacitor connection pins, 2 ports serve as common pins.)*3 (8 ports also serve as an A/D input) 16 (12 ports also serve as an external interrupt) 2 (Also serve as peripherals) 54 (max.)
8-bit timer operation (toggled output capable, operating clock cycle 1.9 s to 486 s) 16-bit timer operation (toggled output capable, operating clock cycle 1.9 s to 486 s) 8 bits LSB first/MSB first selectability One clock selectable from four operation clocks (one external shift clock, three internal shift clocks: 1.9 s, 7.6 s, 30.4 s) Common output: Segment output: Bias power supply pins: LCD display RAM size: Booster for LCD driving: Dividing resistor for LCD driving: 4 (max.) 24 (max.) *3 4 24 x 4 bits Built-in (product with a booster)*3 Built-in (an external resistor selectability)
LCD controller/driver
Without a booster for LCD driving
A/D converter
8-bit resolution x 8 channels A/D conversion mode (conversion time 43 s/4.2 MHz (44 instruction cycles)) Sense mode (conversion time 11.9 s/4.2 MHz) Continuous activation by an internal timer capable Reference voltage input
(Continued)
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MB89160/160A Series
(Continued)
Part number Parameter
MB89161/ MB89161A*1
MB89163/ MB89163A*1
MB89165/ MB89165A*1
MB89P165
MB89W165
MB89PV160
PWM timer 1, PWM timer 2
8 bits x 2 channels 8-bit reload timer operation (toggled output capable, operating clock cycle: 0.95 s to 124 ms) 8-bit resolution PWM operation (conversion cycle: 243 s to 32 s) 4 independent channels (edge selectability) Rising edge/falling edge selectability Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in stop mode.) "L" level interrupts x 8 channels 1 (7 frequencies are selectable by the software.) 1 (Pulse width and cycle are software selectable.) Subclock mode, sleep mode, stop mode, and watch mode CMOS 2.2 V to 6.0 V (single clock)/ 2.2 V to 4.0 V (dual clock) 2.7 V to 6.0 V MBM27C256A20TV
External interrupt 1 (wake-up function)
External interrupt 2 Buzzer output Remote control transmission output Standby modes Process Operating voltage*2 EPROM for use *1: Products with an internal booster.
*2: Varies with conditions such as the operating frequency. (The operating voltage of the A/D converter is assured separately. See section "s Electrical Characteristics.") *3: See section "s Mask Options."
s PACKAGE AND CORRESPONDING PRODUCTS
Package FPT-80P-M05 FPT-80P-M06 FPT-80P-M11 MQP-80C-P01 FPT-80C-A02 : Available x x x : Not available x x x x x x x MB89161 MB89161A MB89163 MB89163A MB89165 MB89165A MB89PW165 MB89W165 x x x MB89PV160 x x x x
Note: For more information about each package, see section "s Package Dimensions."
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MB89160/160A Series
s DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, verify its differences from the product that will actually be used. Take particular care on the following points: * On the MB89161/A and MB89163/A, the upper half of each register bank cannot be used. * The stack area, etc., is set at the upper limit of the RAM.
2. Current Consumption
* In the case of the MB89PV160, add the current consumed by the EPROM which is connected to the top socket. * When operated at low speed, the product with an OTPROM (one-time PROM) or an EPROM will consume more current than the product with a mask ROM. However, the current consumption in the sleep/stop modes is the same. (For more information, see section "s Electrical Characteristics.")
3. Mask Options
Functions that can be selected as options and how to designate these options vary by the product. Before using options check section "s Mask Options." Take particular care on the following points: * A pull-up resistor cannot be set for P20 to P27 on the MB89P165. * A pull-up resistor is not selectable for P40 to P47 and P60 to P67 if they are used as LCD pins. * Options are fixed on the MB89PV160.
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MB89160/160A Series
s PIN ASSIGNMENT
(Top view) P45/SEG21*7 P44/SEG20*7 P43/SEG19*6 P42/SEG18*6 P41/SEG17*6 P40/SEG16*6 P67/SEG15*5 P66/SEG14*5 P65/SEG13*5 P64/SEG12*5 P63/SEG11*4 P62/SEG10*4 P61/SEG9*4 P60/SEG8*4 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 P46/SEG22*7 P47/SEG23*7 AVSS AVR AVCC P50/AN0 P51/AN1 P52/AN2 P53/AN3 P54/AN4 P55/AN5 P56/AN6 VSS P57/AN7 X1 X0 MOD1 MOD0 RST P00/INT20 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
SEG1 SEG0 P71/COM3*8 P70/COM2*8 COM1 COM0 V3 VCC V2 V1 V0 P33*2/C0*1 P32*2/C1*1 P31/PWM1 P30/RCO/BUZ X1A X0A P27/PWM2*3 P26*3 P25/SCK
Note: For more information on mask option combinations of *4 to *8, see section "s Mask Options."
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P01/INT21 P02/INT22 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14 P15 P16 P17 P20/EC P21*3 P22/TO P23/SI P24/SO (FPT-80P-M11) *1: For products with a booster circuit *2: For products without a booster circuit *3: N-ch open-drain heavy-current drive type *4 to *7: Selected using the mask option (in units of 4 pins) *8: Selected using the mask option (in units of 2 pins)
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MB89160/160A Series
(Top view)
P44/SEG20*7 P45/SEG21*7 P46/SEG22*7 P47/SEG23*7 AVSS AVR AVCC P50/AN0 P51/AN1 P52/AN2 P53/AN3 P54/AN4 P55/AN5 P56/AN6 VSS P57/AN7 X1 X0 MOD1 MOD0 RST P00/INT20 P01/INT21 P02/INT22
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
P43/SEG19*6 P42/SEG18*6 P41/SEG17*6 P40/SEG16*6 P67/SEG15*5 P66/SEG14*5 P65/SEG13*5 P64/SEG12*5 P63/SEG11*4 P62/SEG10*4 P61/SEG9*4 P60/SEG8*4 SEG7 SEG6 SEG5 SEG4
SEG3 SEG2 SEG1 SEG0 P71/COM3*8 P70/COM2*8 COM1 COM0 V3 VCC V2 V1 V0 P33*2/C0*1 P32*2/C1*1 P31/PWM1 P30/RCO/BUZ X1A X0A P27/PWM2*3 P26*3 P25/SCK P24/SO P23/SI
*1: For products with a booster circuit *2: For products without a booster circuit *3: N-ch open-drain heavy-current drive type *4 to *7: Selected using the mask option (in units of 4 pins) *8: Selected using the mask option (in units of 2 pins) Note: For more information on mask option combinations of *4 to *8, see section "s Mask Options."
P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14 P15 P16 P17 P20/EC P21*3 P22/TO (FPT-80P-M06) (FPT-80C-A02)
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MB89160/160A Series
(Top view) P45/SEG21*7 P44/SEG20*7 P43/SEG19*6 P42/SEG18*6 P41/SEG17*6 P40/SEG16*6 P67/SEG15*5 P66/SEG14*5 P65/SEG13*5 P64/SEG12*5 P63/SEG11*4 P62/SEG10*4 P61/SEG9*4 P60/SEG8*4 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 P46/SEG22*7 P47/SEG23*7 AVSS AVR AVCC P50/AN0 P51/AN1 P52/AN2 P53/AN3 P54/AN4 P55/AN5 P56/AN6 VSS P57/AN7 X1 X0 MOD1 MOD0 RST P00/INT20 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
SEG1 SEG0 P71/COM3*8 P70/COM2*8 COM1 COM0 V3 VCC V2 V1 V0 P33*2/C0*1 P32*2/C1*1 P31/PWM1 P30/RCO/BUZ X1A X0A P27/PWM2*3 P26*3 P25/SCK
*1: For products with a booster circuit *2: For products without a booster circuit *3: N-ch open-drain heavy-current drive type *4 to *7: Selected using the mask option (in units of 4 pins) *8: Selected using the mask option (in units of 2 pins) Note: For more information on mask option combinations of *4 to *8, see section "s Mask Options."
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P01/INT21 P02/INT22 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14 P15 P16 P17 P20/EC P21*3 P22/TO P23/SI P24/SO (FPT-80P-M05)
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MB89160/160A Series
(Top view)
P43/SEG19*6 P42/SEG18*6 P41/SEG17*6 P40/SEG16*6 P67/SEG15*5 P66/SEG14*5 P65/SEG13*5 P64/SEG12*5 P63/SEG11*4 P62/SEG10*4 P61/SEG9*4 P60/SEG8*4 SEG7 SEG6 SEG5 SEG4
P44/SEG20*7 P45/SEG21*7 P46/SEG22*7 P47/SEG23*7 AVSS AVR AVCC P50/AN0 P51/AN1 P52/AN2 P53/AN3 P54/AN4 P55/AN5 P56/AN6 VSS P57/AN7 X1 X0 MOD1 MOD0 RST P00/INT20 P01/INT21 P02/INT22
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
101 102 103 104 105 106 107 108 109
93 92 91 90 89 88 87 86 85
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
SEG3 SEG2 SEG1 SEG0 P71/COM3*8 P70/COM2*8 COM1 COM0 V3 VCC V2 V1 V0 P33*2/C0*1 P32*2/C1*1 P31/PWM1 P30/RCO/BUZ X1A X0A P27/PWM2*3 P26*3 P25/SCK P24/SO P23/SI
*1: For products with a booster circuit *2: For products without a booster circuit *3: N-ch open-drain heavy-current drive type *4 to *7: Selected using the mask option (in units of 4 pins) *8: Selected using the mask option (in units of 2 pins) Note: For more information on mask option combinations of *4 to *8, see section "s Mask Options."
* Pin assignment on package top (MB89PV160 only) Pin no. 81 82 83 84 85 86 87 88 Pin name N.C. VPP A12 A7 A6 A5 A4 A3 Pin no. 89 90 91 92 93 94 95 96 Pin name A2 A1 A0 N.C. O1 O2 O3 VSS Pin no. 97 98 99 100 101 102 103 104 Pin name N.C. O4 O5 O6 O7 O8 CE A10 Pin no. 105 106 107 108 109 110 111 112 Pin name OE N.C. A11 A9 A8 A13 A14 VCC
N.C.: Internally connected. Do not use. 9
P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14 P15 P16 P17 P20/EC P21*3 P22/TO
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
110 111 112 81 82 83 84
100 99 98 97 96 95 94
(MQP-80C-P01)
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MB89160/160A Series
s PIN DESCRIPTION
Pin no. SQFP QFP*2 16 15 18 17 19
*1
MQFP*3 QFP*4 18 17 20 19 21
Pin name X0 X1 MOD0 MOD1 RST
Circuit type A C D
Function Main clock crystal oscillator pins CR oscillation selectability (mask products only) Operating mode selection pins Connect directly to VSS. Reset I/O pin This pin is an N-ch open-drain output type with a pull-up resistor, and a hysteresis input type. "L" is output from this pin by an internal reset source. The internal circuit is initialized by the input of "L". General-purpose I/O ports Also serve as an external interrupt 2 input (wake-up function). External interrupt 2 input is hysteresis input. General-purpose I/O ports Also serve as an external interrupt 1 input. External interrupt 1 input is hysteresis input. General-purpose I/O ports N-ch open-drain general-purpose I/O port Also serves as the external clock input for the timer. The peripheral is a hysteresis input type. N-ch open-drain general-purpose I/O port N-ch open-drain general-purpose I/O port Also serves as a timer output. N-ch open-drain general-purpose I/O port Also serves as the data input for the serial I/O. The peripheral is a hysteresis input type. N-ch open-drain general-purpose I/O port Also serves as the data output for the serial I/O. N-ch open-drain general-purpose I/O port Also serves as the clock I/O for the serial I/O. The peripheral is a hysteresis input type. N-ch open-drain general-purpose I/O port N-ch open-drain general-purpose I/O port Also serves as the square wave or PWM wave output for the 8-bit PWM timer 2. Functions as an N-ch open-drain general-purpose output port only in the products without a booster. Functions as a capacitor connection pin in the products with a booster.
20 to 27
22 to 29
P00/INT20 to P07/INT27
E
28 to 31
30 to 33
P10/INT10 to P13/INT13 P14 to P17 P20/EC
E
32 to 35 36
34 to 37 38
F H
37 38 39
39 40 41
P21 P22/TO P23/SI
I I H
40 41
42 43
P24/SO P25/SCK
I H
42 43
44 45
P26 P27/PWM2
I I
49
51
P33 C0
J --
*1: *2: *3: *4:
FPT-80P-M05 FPT-80P-M11 MQP-80C-P01 FPT-80P-M06
(Continued)
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MB89160/160A Series
(Continued)
Pin no. SQFP*1 QFP*2 48 MQFP*3 QFP*4 50 Pin name P32 C1 47 49 P31/PWM1 Circuit type J -- G Function Functions as an N-ch open-drain general-purpose output port only in the products without a booster. Functions as a capacitor connection pin in the products with a booster. General-purpose output-only port Also serves as the square wave or PWM wave output for the 8-bit PWM timer 1. General-purpose output-only port Also serves as a buzzer output and a remote control transmission frequency output. N-ch open-drain general-purpose output ports Also serve as an analog input. N-ch open-drain general-purpose output ports Also serve as an LCD controller/driver segment output. Switching between port and segment output is done by the mask option. LCD controller/driver segment output pins N-ch open-drain general-purpose output ports Also serve as an LCD controller/driver common output. Switching between port and common output is done by the mask option. LCD controller/driver common output-only pins LCD driving power supply pins Subclock crystal oscillator pins (32.768 KHz) Power supply pin Power supply (GND) pin A/D converter power supply pin Use this pin at the same voltage as VCC. A/D converter reference voltage input pin A/D converter power supply pin Use this pin at the same voltage as VSS.
46
48
P30/RCO/BUZ
G
14, 12 to 6 2, 1, 80 to 75 74 to 67 66 to 59 58, 57
16, 14 to 8 4 to 1 80 to 77 76 to 69 68 to 61 60, 59
P57/AN7 to P50/AN0 P47/SEG23 to P40/SEG16 P67/SEG15 to P60/SEG8 SEG7 to SEG0 P71/COM3, P70/COM2
L J/K J/K K J/K
56, 55 54, 52 to 50 44 45 53 13 5 4 3
58, 57 56, 54 to 52 46 47 55 15 7 6 5
COM1, COM0 V3, V2 to V0 X0A X1A VCC VSS AVSS AVR AVSS
K -- B -- -- -- -- --
*1: *2: *3: *4:
FPT-80P-M05 FPT-80P-M11 MQP-80C-P01 FPT-80P-M06
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MB89160/160A Series
* External EPROM pins (MB89PV160 only) Pin no. 82 83 84 85 86 87 88 89 90 91 93 94 95 96 98 99 100 101 102 103 104 105 107 108 109 110 111 112 81 92 97 106 VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 VSS O4 O5 O6 O7 O8 CE A10 OE A11 A9 A8 A13 A14 VCC N.C. Pin name I/O O O "H" level output pin Address output pins Function
I
Data input pins
O I
Power supply (GND) pin Data input pins
O O O O
ROM chip enable pin Outputs "H" during standby. Address output pin ROM output enable pin Outputs "L" at all times. Address output pins
O O O -- EPROM power supply pin Internally connected pins Be sure to leave them open.
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MB89160/160A Series
s I/O CIRCUIT TYPE
Type Circuit Remarks
A
X1
X0
Main clock * At an oscillation feedback resistor of approximately 1 M/5.0 V * CR oscillation is selectable (MB8916X/A only).
Standby control signal
B
X1A
Subclock * At an oscillation feedback resistor of approximately 4.5 M/5.0 V
X0A
Standby control signal
C
D
R P-ch
* At an output pull-up resistor of approximately 50 k/5.0 V * Hysteresis input
N-ch
E
R P-ch P-ch
* CMOS I/O * The peripheral is a hysteresis input type.
N-ch Port Peripheral
* Pull-up resistor optional (Not available on the MB89PV160.)
(Continued)
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MB89160/160A Series
(Continued)
Type Circuit Remarks
F
R P-ch P-ch
* CMOS I/O
N-ch
* Pull-up resistor optional (Not available on the MB89PV160) G
P-ch
* CMOS output * P-ch output is a heavy-current drive type.
N-ch Port
H
R P-ch
* * * * *
N-ch Port Peripheral
N-ch open-drain I/O CMOS input The peripheral is a hysteresis input type. P21, P26, and P27 are a heavy-current drive type. Pull-up resistor optional (Not available on the MB89P165/A, MB89W165/A and MB89PV160)
I
P-ch
R
* N-ch open-drain output * CMOS input
N-ch Port
* Pull-up resistor optional (Not available on the MB89P165/A, MB89W165/A and MB89PV160) * N-ch open-drain output * Pull-up resistor optional (Not available on the MB89P165/A, MB89W165/A and MB89PV160) * P32 and P33 are not provided with a pull-up resistor.
J
R P-ch
N-ch
(Continued)
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MB89160/160A Series
(Continued)
Type Circuit Remarks
K
P-ch N-ch
* LCD controller/driver segment output
P-ch N-ch
L
R P-ch P-ch
* N-ch open-drain output * Analog input
N-ch Analog input
* Pull-up resistor optional (Not available on the MB89PV160)
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MB89160/160A Series
s HANDLING DEVICES
1. Preventing Latchup
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on " 1. Absolute Maximum Ratings" in section "s Electrical Characteristics" is applied between VCC to VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital power supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/D and D/A Converters
Connect to be AVCC = DAVC = VCC and AVSS = AVR = VSS even if the A/D and D/A converters are not in use.
4. Treatment of N.C. Pin
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Fluctuations
Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched.
6. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and wake-up from stop mode.
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MB89160/160A Series
s PROGRAMMING TO THE EPROM ON THE MB89P165
The MB89P165 is an OTPROM version of the MB89160 series.
1. Features
* 32-Kbyte PROM on chip * Options can be set using the EPROM programmer. * Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in each mode such as 32-Kbyte PROM, option area is diagrammed below.
Address 0000H I/O 0080H RAM 0280H Not available 8000H Not available 3FF0H Not available 3FF6H Not available C000H 4000H Not available Option area 0000H Not available Single-chip EPROM mode (Corresponding addresses on the EPROM programmer)
PROM 16 KB
EPROM 16 KB
FFFFH
7FFFH
3. Programming to the EPROM
In EPROM mode, the MB89P165 functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. When the operating area for a single chip is 16 Kbyte (C000H to FFFFH) the PROM can be programmed as follows: * Programming procedure (1) Set the EPROM programmer to the MBM27C256A. (2) Load program into the EPROM programmer at 4000H to 7FFFH. (Note that addresses C000H to FFFFH while operating as a single chip assign to 4000H to 7FFFH in EPROM mode.) Load option data into address 3FF0H to 3FF5H of the EPROM programmer. (For information about each corresponding option, see "8. Setting OTPROM Options.") (3) Program with the EPROM programmer. 17
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MB89160/160A Series
4. Recommended Screening Conditions
High-temperature aging is recommended as the pre-assembly screening procedure for a product with a blanked OTPROM microcomputer program.
Program, verify
Aging +150C, 48 Hrs.
Data verification
Assembly
5. Programming Yield
All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature. For this reason, a programming yield of 100% cannot be assured at all times.
6. EPROM Programmer Adapter Socket
Package FPT-80P-M05 FPT-80P-M06 FPT-80P-M11 Compatible adapter socket ROM-80SQF-28DP-8L ROM-80QF-28DP-8L3 ROM-80QF2-28DP-8L2
7. Erasure
In order to clear all locations of their programmed contents, it is necessary to expose the internal EPROM to an ultraviolet light source. A dosage of 10 W-seconds/cm2 is required to completely erase an internal EPROM. This dosage can be obtained by exposure to an ultraviolet lamp (wavelength of 2537 Angstroms (A)) with intensity of 12000 W/cm2 for 15 to 21 minutes. The internal EPROM should be about one inch from the source and all filters should be removed from the UV light source prior to erasure. It is important to note that the internal EPROM and similar devices, will erase with light sources having wavelengths shorter than 4000A. Although erasure time will be much longer than with UV source at 2537A, nevertheless the exposure to fluorescent light and sunlight will eventually erase the internal EPROM, and exposure to them should be prevented to realize maximum system reliability. If used in such an environment, the package windows should be covered by an opaque label or substance.
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MB89160/160A Series
8. Setting OTPROM Options
The programming procedure is the same as that for the PROM. Options can be set by programming value at the addresses shown on the memory map. The relationship between bits and options is shown on the following bit map: * OTPROM option bit map Bit 7 Vacancy 3FF0H Readable P07 Pull-up 3FF1H 1: No 0: Yes P17 Pull-up 3FF2H 1: No 0: Yes P57 Pull-up 3FF3H 1: No 0: Yes Vacancy 3FF4H Readable Vacancy 3FF5H Readable Readable Readable Readable Readable Readable Readable Readable Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable P06 Pull-up 1: No 0: Yes P16 Pull-up 1: No 0: Yes P56 Pull-up 1: No 0: Yes Vacancy Bit 6 Vacancy Bit 5 Bit 4 Bit 3 Vacancy Bit 2 Reset pin output 1: Yes 0: No P02 Pull-up 1: No 0: Yes P12 Pull-up 1: No 0: Yes P52 Pull-up 1: No 0: Yes Vacancy Bit 1 Clock mode selection 1: Dual clock 0: Single clock P01 Pull-up 1: No 0: Yes P11 Pull-up 1: No 0: Yes P51 Pull-up 1: No 0: Yes Vacancy Bit 0 Power-on reset 1: Yes 0: No P00 Pull-up 1: No 0: Yes P10 Pull-up 1: No 0: Yes P50 Pull-up 1: No 0: Yes Vacancy
Oscillation stabilization time
WTM1 WTM0 Readable See section "s Mask Option." P05 Pull-up 1: No 0: Yes P15 Pull-up 1: No 0: Yes P55 Pull-up 1: No 0: Yes Vacancy P04 Pull-up 1: No 0: Yes P14 Pull-up 1: No 0: Yes P54 Pull-up 1: No 0: Yes Vacancy P03 Pull-up 1: No 0: Yes P13 Pull-up 1: No 0: Yes P53 Pull-up 1: No 0: Yes Vacancy
Notes: * Set each bit to 1 to erase. * Do not write 0 to the vacant bit. The read value of the vacant bit is 1, unless 0 is written to it.
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MB89160/160A Series
s PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TV
2. Programming Socket Adapter
To program to the PROM using an EPROM programmer, use the socket adapter (manufacturer: Sun Hayato Co., Ltd.) listed below. Package LCC-32 (Rectangle) Adapter socket part number ROM-32LC-28DP-YG
Inquiry: Sun Hayato Co., Ltd.: TEL 81-3-3802-5760
3. Memory Space
Memory space in each mode, such as 32-Kbyte PROM, option area is diagrammed below.
Address 0000H
Single chip
Corresponding addresses on the EPROM programmer
I/O 0080H RAM 0280H Not available 8000H 0000H
PROM 32 KB
EPROM 32 KB
FFFFH
7FFFH
4. Programming to the EPROM
(1) Set the EPROM programmer to the MBM27C256A. (2) Load program data into the EPROM programmer at 0000H to 7FFFH. (3) Program to 0000H to 7FFFH with the EPROM programmer.
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MB89160/160A Series
s BLOCK DIAGRAM
X0 X1 Main clock oscillator Clock controller 8-bit timer/counter Internal bus X0A X1A Subclock oscillator (32.768 KHz) Watch prescaler timer Reset circuit ( W DT) 8 Port 0 P00/INT20 to P07/INT27 8 External interrupt 2 (Wake-up) CMOS I/O port N-ch open-drain I/O port 4 Port 1 P10/INT10 to P13/INT13 4 P14 to P17 4 External interrupt 1 (Wake-up) CMOS I/O port 8 RAM LCD F 2 M C- 8L CPU controller/driver 2 N-ch open-drain output port Port 6 and port 7 Port 4 8 4 P44/SEG20*3 to P47/SEG23 4 4 2 P70/COM2*3, P71/COM3 8 SEG0 to SEG7 RO M 24 x 4 bits VRAM N-ch open-drain output port P50/AN0 to P57/AN7 AVCC AVR AVSS Port 5 8 8 8-bit A/D converter
Reference voltage generator and booster*1
Time-base timer
P22/TO Port 2
8-bit timer/counter
P20/EC
RST
8-bit PWM timer 2
P27/PWM2*4 P25/SCK P24/SO P23/SI P21*4, P26*4 4 P40/SEG16*3 to P43/SEG19
8-bit serial
P60/SEG8*3 to P63/SEG11 P64/SEG12*3 to P67/SEG15
2 COM0, COM1 4 V0 to V3 P33/C0*2 P32/C1*2
8-bit PWM timer 1
P31/PWM1 P30/RCO/BUZ
Remote control output
Other pins MOD0, MOD1, VCC, VSS
Buzzer output N-ch open-drain I/O port (P30 and P31 are a CMOS output type.)
*1: Selected by mask option *2: Used as ports without a reference voltage generator and booster *3: Functions selected by mask option. (For information on selecting procedure, see section "s Mask Options.") *4: Heavy-current drive type
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MB89160/160A Series
s CPU CORE
1. Memory Space
The microcontrollers of the MB89160 series offer a memory space of 64 Kbytes for storing all of I/O, data, and program areas. The I/O area is located at the lowest address. The data area is provided immediately above the I/O area. The data area can be divided into register, stack, and direct areas according to the application. The program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of interrupt reset vectors and vector call instructions toward the highest address within the program area. The memory space of the MB89160 series is structured as illustrated below. Memory Space
MB89PV160 I/O 0080H 0080H Not available 00C0H RAM 256 B 0100H Register 0180H 0200H 0280H Not available 8000H Not available Not available C000H E000H External ROM 32 KB FFFFH F000H ROM 4 KB ROM 8 KB FFFFH FFFFH ROM 16 KB 0200H 0280H Not available 0100H 0140H RAM 128 B Register Register Register RAM 256 B 0100H 0100H RAM 512 B MB89161/A I/O 0080H MB89163/A I/O 0080H MB89165/A MB89P165 I/O
0000H
0000H
0000H
0000H
FFFFH
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MB89160/160A Series
2. Registers
The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers in the memory. The following dedicated registers are provided: Program counter (PC): Accumulator (A): A 16-bit register for indicating instruction storage positions A 16-bit temporary register for storing arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T): A 16-bit register which performs arithmetic operations with the accumulator When the instruction is an 18-bit data processing instruction, the lower byte is used. Index register (IX): Extra pointer (EP): Stack pointer (SP): Program status (PS): A 16-bit register for index modification A 16-bit pointer for indicating a memory address A 16-bit register for indicating a stack area A 16-bit register for storing a register pointer, a condition code
16 bits PC A T IX EP SP PS : Program counter : Accumulator : Temporary accumulator : Index register : Extra pointer : Stack pointer : Program status
Initial value FFFDH Undefined Undefined Undefined Undefined Undefined I-flag = 0, IL1, 0 = 11 Other bits are undefined.
The PS can further be divide into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR). (See the diagram below.)
Structure of the Program Status Register
15 PS
14
13 RP
12
11
10
9
8
7 H
6 I
5
4
3 N
2 Z
1 V
0 C
Vacancy Vacancy Vacancy
IL1, 0
RP
CCR
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MB89160/160A Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. Rule for Conversion of Actual Addresses of the General-purpose Register Area
RP Lower OP codes b1 b0
"0" "0" "0" "0" "0" "0" "0" "1" R4 R3 R2 R1 R0 b2
Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of CPU operations at the time of an interrupt. H-flag: Set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared otherwise. This flag is for decimal adjustment instructions. I-flag: IL1, 0: Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0. Set to 0 when reset. Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit.
IL1 0 0 1 1
IL0 0 1 0 1
Interrupt level 1 2 3
High-low High
Low = no interrupt
N-flag: Set if the MSB is set to 1 as the result of an arithmetic operation. Cleared when the bit is set to 0. Z-flag: V-flag: Set when an arithmetic operation results in 0. Cleared otherwise. Set if the complement on 2 overflows as a result of an arithmetic operation. Reset if the overflow does not occur.
C-flag: Set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared otherwise. Set the shift-out value in the case of a shift instruction.
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MB89160/160A Series
The following general-purpose registers are provided: General-purpose registers: An 8-bit register for storing data The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains eight registers. Up to a total of 16 banks can be used on the MB89163 (RAM 256 x 8 bits), and a total of 32 banks can be used on the MB89165 (RAM 256 x 8 bits). The bank currently in use is indicated by the register bank pointer (RP). Note: The number of register banks that can be used varies with the RAM size. Register Bank Configuraiton
This address = 0100H + 8 x (RP) R0 R1 R2 R3 R4 R5 R6 R7 16 banks (MB89163) 32 banks (MB89165)
Memory area
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MB89160/160A Series
s I/O MAP
Address 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (W) T2CR T1CR T2DR T1DR SMR SDR CNTR1 COMP1 (R/W) (R/W) (R/W) (R/W) PDR6 PDR7 RCR1 RCR2 (R/W) (R/W) (R/W) PDR4 PDR5 BUZR (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) SYCC STBC WDTE TBTC WPCR PDR3 Read/write (R/W) (W) (R/W) (W) (R/W) (W) Register name PDR0 DDR0 PDR1 DDR1 PDR2 DDR2 Register description Port 0 data register Port 0 data direction register Port 1 data register Port 1 data direction register Port 2 data register Port 2 data direction register Vacancy System clock control register Standby control register Watchdog timer control register Time-base timer control register Watch prescaler control register Port 3 data register Vacancy Port 4 data register Port 5 data register Buzzer register Vacancy Port 6 data register Port 7 data register Remote control transmission register 1 Remote control transmission register 2 Vacancy Vacancy Timer 2 control register Timer 1 control register Timer 2 data register Timer 1 data register Serial mode register Serial data register PWM 1 control register PWM 1 compare register
(Continued)
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MB89160/160A Series
(Continued)
Address 20H 21H 22H to 2CH 2DH 2EH 2FH 30H 31H 32H 33H 34H to 5FH 60H to 6BH 6CH to 71H 72H 73H to 7BH 7CH 7DH 7EH 7FH (W) (W) (W) Access prohibited ILR1 ILR2 ILR3 ITR (R/W) LCDR (R/W) VRAM (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) ADC1 ADC2 ADCD EIE1 EIF1 EIE2 EIF2 Read/write (R/W) (W) Register name CNTR2 COMP2 Register description PWM 2 control register PWM 2 compare register Vacancy A/D converter control register 1 A/D converter control register 2 A/D converter data register External interrupt 1 enable register 1 External interrupt 1 flag register 1 External interrupt 2 enable register 2 External interrupt 2 flag register 2 Vacancy Display data RAM Vacancy LCD controller/driver control register 1 Vacancy Interrupt level setting register 1 Interrupt level setting register 2 Interrupt level setting register 3 Interrupt test register
Note: Do not use vacancies.
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MB89160/160A Series
s ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
(AVSS = VSS = 0.0 V) Parameter Symbol VCC Power supply voltage AVCC AVR LCD power supply voltage V0 to V3 VI1 Input voltage VI2 VSS - 0.3 VSS + 7.0 V Value Min. VSS - 0.3 VSS - 0.3 VSS - 0.3 VSS - 0.3 VSS - 0.3 Max. VSS + 7.0 VSS + 7.0 VSS + 7.0 VSS + 7.0 VCC + 0.3 Unit V V V V V AVCC must not exceed VCC + 0.3 V. AVR must not exceed AVCC + 0.3 V. V0 to V3 on the product without booster must not exceed VCC. VI1 must not exceed VSS + 7.0 V. All pins except P20 to P27 without a pull-up resistor P20 to P27 without a pull-up resistor VO1 must not exceed VSS + 7.0 V. All pins except P20 to P27, P32, P33, P40 to P47, and P60 to P67 without a pull-up resistor P20 to P27, P32, P33, P40 to P47, and P60 to P67 without a pull-up resistor All pins except P21, P26, and P27 P21, P26, and P27 All pins except P21, P26, P27, and power supply pins Average value (operating current x operating rate) P21, P26, and P27 Average value (operating current x operating rate) Peak value Average value (operating current x operating rate) All pins except P30, P31, and power supply pins P30 and P31 Remarks
VO1 Output voltage VO2 IOL1 IOL2 IOLAV1 "L" level average output current IOLAV2 "L" level total maximum output current "L" level total average output current IOL IOLAV IOH1 IOH2
VSS - 0.3
VCC + 0.3
V
VSS - 0.3
VSS + 7.0 10 20 4
V mA mA mA
"L" level maximum output current

8 100 40 -5 -10
mA mA mA mA mA
"H" level maximum output current
(Continued)
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MB89160/160A Series
(Continued)
(AVSS = VSS = 0.0 V) Parameter Symbol Value Min. -- Max. -2 Unit Remarks All pins except P30, P31, and power supply pins Average value (operating current x operating rate) P30 and P31 Average value (operating current x operating rate) Peak value Average value (operating current x operating rate)
IOHAV1 "H" level average output current IOHAV2 "H" level total maximum output current "H" level total average output current Power consumption Operating temperature Storage temperature IOH IOHAV PD TA Tstg
mA
-- -- -- -- -40 -55
-4 -50 -10 300 +85 +150
mA mA mA mW C C
Precautions: Parmanent device damage may occur if the above "Absolute Maximum Ratings" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2. Recommended Operating Conditions
(AVSS = VSS = 0.0 V) Parameter Symbol Value Min. 2.2*1 VCC AVCC 2.2*1 2.7 1.5 AVR 2.0 Max. 6.0*1 4.0 6.0 6.0 AVCC Unit V V V V V Remarks Normal operation assurance range*1 Dual-clock mask ROM products Normal operation assurance range for MB89P165/A and MB89W165/A Retains the RAM state in stop mode Normal operation assurance range V0 to V3 pins on the products without a booster LCD power supply range (The optimum value dependent on the LCD element in use.) MOD1 pin of the MB89P165
Power supply voltage
LCD power supply voltage
V0 to V3
VSS
VCC
V
EPROM program power supply voltage Operating temperature
VPP TA
-- -40
VSS + 13.0 +85
V C
*1: The minimum operating power supply voltage varies with the execution time (instruction cycle time) setting for the operating frequency. A/D converter assurance accuracy varies with the operating power supply voltage. *2: P32 and P33 are applicable only for procucts of the MB89160 series (without "A" suffix). P40 to P47 and P60 to P67 are applicable when selected as ports. 29
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MB89160/160A Series
6 Analog accurancy assured in the AVCC = VCC = 3.5 V to 6.0 V range
5 Operating voltage (V) Operation assurance range 4
3
2
1
1 Main clock operating frequency
2
3
4
(MHz)
4.0 2.0 Minimum execution time (instruction cycle) Note: The shaded area is assured only for the MB8916X/A.
1.0
(s)
Figure 1
Operating Voltage vs. Main Clock Operating Frequency (Single-clock MB8916X/A and MB89P165/PV160)
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MB89160/160A Series
6
Operating voltage (V)
5
4 Operation assurance range 3
Analog accurancy assured in the AVCC = VCC = 3.5 V to 6.0 V range
2
1
1 2 Main clock operating frequency
3
4 (MHz)
4.0 2.0 Minimum execution time (instruction cycle)
1.0 (s)
Figure 2
Operating Voltage vs. Main Clock Operating Frequency (Dual-clock MB8916X/A)
Figures 1 and 2 indicate the operating frequency of the external oscillator at an instruction cycle of 4/FCH. Since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the operating speed is switched using a gear.
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3. DC Characteristics
(1) Pin DC characteristics (VCC = +5.0 V) (VSS = 0.0 V, TA = -40C to +85C) Value Unit Remarks Typ. Max. VCC + 0.3 V
Parameter
Symbol
Pin P00 to P07, P10 to P17, P20 to P27 RST, MOD0, MOD1, EC, SI, SCK, INT10 to INT13, INT20 to INT27 P00 to P07, P10 to P17, P20 to P27 RST, MOD0, MOD1, EC, SI, SCK, INT10 to INT13, INT20 to INT27 P20 to P27, P33, P32, P40 to P47, P60 to P67 P50 to P57 P00 to P07, P10 to P17 P30, P31 P00 to P07, P10 to P17, P20 to P27, P30 to P33, P40 to P47, P50 to P57, P60 to P67, P70 to P71 P21, P26, P27 RST P00 to P07, P10 to P17, MOD0, MOD1, P30, P31
Condition
Min. 0.7 VCC
VIH "H" level input voltage VIHS
0.8 VCC
VCC + 0.3
V
VIL "L" level input voltage VILS
VSS - 0.3 VSS - 0.3
0.3 VCC
V
0.2 VCC
V
Open-drain output pin application voltage
VD1
VSS - 0.3 VSS - 0.3 IOH = -2.0 mA IOH = -6.0 mA 2.4 4.0

VSS + 6.0*2
V
P20 to P27, P40 to P47, and P60 to P67 without pullup resistor only
VD2 "H" level output voltage VOH1 VOH2
VCC + 0.3
V V V
VOL "L" level output voltage VOL2 VOL3 Input leakage current (Hi-z output leakage ILI1 current)
IOL = 1.8 mA
0.4
V
IOL = 8.0 mA IOL = 4.0 mA 0.45 V < VI < VCC

0.4 0.6 5
V V A Without pull-up resistor
(Continued)
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MB89160/160A Series
(Continued)
(VSS = 0.0 V, TA = -40C to +85C) Value Unit Remarks Typ. Max. Without pull-up resistor Without pull-up resistor
Parameter
Symbol
Pin P20 to P27, P32, P33, P40 to P47, P60 to P67, P70, P71 P50 to P57 P00 to P07, P10 to P17, P20 to P27, P40 to P47, P50 to P57, P60 to P67, RST
Condition
Min.
Open-drain output leakage current
ILO1
0.45 V < VI < 6.0 V
--
--
1
A
ILO2
0.45 V < VI < VCC
--
--
1
A
Pull-up resistance
RPULL
VI = 0.0 V
25
50
100
k
With pull-up resistor
Common output impedance Segment output impedance LCD divided resistance
RVCOM COM0 to COM3 V1 to V3 = +5.0 V RVSEG SEG0 to SEG24
-- --
-- --
2.5 15
k k Products without a booster only
RLCD
-- V0 to V3, COM0 to COM3, SEG0 to SEG23 V3 V2 V1
Between VCC and V0
300
500
750
k
LCD controller/driver ILCDL leakage current VOV3 Booster for LCD driving output voltage VOV2 Reference output voltage for LCD driving Reference voltage input impedance Input capacitance VOV1
--
-- 4.3 2.9 1.27
-- 4.5 3.0 1.5
1 4.7 3.1 1.73
A V V V Procucts with a booster only Products with a booster only
V1 = 1.5 V IIN = 0 A
RRIN CIN
V1 Other than VCC, VSS
-- f = 1 MHz
600 --
1000 10
1400 --
k pF
Note: For pins which serve as the segment (SEG8 to SEG24) and ports (P40 to P47, P50 to P57, and P60 to P67), see the port parameter when these pins are used as ports and the segment parameter when they are used as segments. P32 and P33 are applicable only for products of the MB89160 series (without "A" suffix). Applicable as external capacitor connection pins for products of the MB89160A series (with "A" suffix).
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(2) Pin DC Characteristics (VCC = +3.0 V) (VCC = 3.0 V, VSS = 0.0 V, TA = -40C to +85C) Value Unit Remarks Min. Typ. Max. 2.4 2.4 -- -- -- -- V V
Parameter "H" level output voltage
Symbol VOH1 VOH2
Pin P00 to P07, P10 to P17 P30, P31 P00 to P07, P10 to P17, P20 to P27, P30 to P33, P40 to P47, P50 to P57, P60 to P67, P70 to P71 RST P21, P26, P27 P00 to P07, P10 to P17, P20 to P27, P40 to P47, P50 to P57, P60 to P67, RST
Condition IOH = -1.0 mA IOH = -3.0 mA
VOL "L" level output voltage VOL2 VOL3
IOL = 1.8 mA
--
--
0.4
V
IOL = 1.8 mA IOL = 3.6 mA
-- --
-- --
0.4 0.4
V V
Pull-up resistance
RPULL
VI = 0.0 V
50
100
150
k
With pull-up resistor
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MB89160/160A Series
(3) Power Supply Current Characteristics (MB8916X) (VSS = 0.0 V, TA = -40C to +85C) Value Unit Remarks Typ. Max. 5.0 8.0 1.5 2.4 0.05 1.0 2.5 10.0 15.0 2.0 2.8 0.1 3.0 5.0 mA MB8916X/A, MB89PV160 MB8916X/A, MB89PV160 MB8916X/A, MB89PV160
Parameter
Symbol
Pin
Condition FCH = 4.2 MHz, VCC = 5.0 V tinst*2 = 4/FCH Main clock operation mode FCH = 4.2 MHz, VCC = 3.0 V tinst*2 = 64/FCH Main clock operation mode FCL = 32.768 kHz, VCC = 3.0 V tinst*2 = 2/FCL Subclock operation mode FCH = 4.2 MHz, VCC = 5.0 V tinst*2 = 4/FCH Main clock sleep mode
Min. -- -- -- -- -- -- --
ICC1
mA MB89PV165 mA
ICC2
mA MB89P165 mA
ICCL
mA MB89PV165 mA MB8916X/A, mA MB89PV160, MB89PV165 A MB8916X, MB89P165-1XX, MB89PV160 MB8916XA, MB89P165-2XX MB8916X MB89PV160, MB89P165-1XX
ICCS1
ICCS2 Power supply current*1 ICCSL
VCC
FCH = 4.2 MHz, VCC = 3.0 V tinst*2 = 64/FCH Main clock sleep mode FCL = 32.768 kHz, VCC = 3.0 V tinst*2 = 2/FCL Subclock sleep mode FCL = 32.768 kHz, VCC = 3.0 V Watch mode FCL = 32.768 kHz, VCC = 3.0 V * Watch mode * During reference voltage generator and booster operation TA = +25C, VCC = 5.0 V Stop mode
--
1.0
1.5
--
25
50
ICCT
--
10
15
A
ICCT2
-- -- -- --
250 0.1 0.1 1.0
400 1.0 10 3.0
A A A
ICCH
IA
AVCC
FCH = 4.2 MHz, VCC = 5.0 V
When A/D mA conversion is activated
*1: The power supply current is measured at the external clock, open output pins, and the external LCD dividing resistor (or external input for the reference voltage). In the case of the MB89PV160, the current consumed by the connected EPROM and ICE is not included. *2: For information on tinst, see "(4) Instruction Cycle" in "4. AC Characteristics."
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4. AC Characteristics
(1) Reset Timing (VCC = +5.0 V 10 %, VSS = 0.0 V, TA = -40C to +85C) Value Condition Unit Remarks Min. Max. -- 48 tXCYL 24 tXCYL -- -- ns ns
Parameter RST "L" pulse width RST "H" pulse width
Symbol tZLZH tZHZL
tZLZH
tZHZL 0.8 VCC
RST
0.2 VCC 0.2 VCC 0.2 VCC
(2) Power-on Reset (VSS = 0.0 V, TA = -40C to +85C) Parameter Power supply rising time Power supply cut-off time tR tOFF Symbol Condition -- -- Value Min. -- 1 Max. 50 -- Unit ms ms Remarks Power-on reset function only Due to repeated operations
Note: Make sure that power supply rises within the selected oscillation stabilization time. If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended.
tR 2.0 V
tOFF
VCC
0.2 V
0.2 V
0.2 V
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MB89160/160A Series
(3) Clock Timing (VSS = 0.0 V, TA = -40C to +85C) Parameter Clock frequency Clock cycle time Input clock pulse width Input clock rising/falling time Symbol FCH FCL tHCYL tLCYL PWH PWL tCR tCF Pin X0, X1 X0A, X1A X0, X1 X0A, X1A X0 X0 Value Min. 1 -- 238 -- 20 -- Typ. -- 32.768 -- 30.5 -- -- Max. 4.2 -- 1000 -- -- 24 Unit MHz kHz ns s ns External clock ns Remarks Main clock Subclock Main clock Subclock
Main Clock Timing and Conditions
tHCYL 0.8 VCC 0.2 VCC PWH tCF PWL tCR
X0
Main Clock Conditions
When a crystal or ceramic resonator is used X0 X1 FCH FCH C0 C1 C When the CR oscillation option is used
When an external clock is used
X0
X1 Open
X0
X1 FCH R
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MB89160/160A Series
Subclock Timing and Conditions
tLCYL
X0A
0.8 VCC
Subclock Conditions
When a crystal or ceramic oscillator is used
When the single-clock option is used
X0A FCL
X1A Rd
X0A
X1A
Open
C0
C1
(4) Instruction Cycle Parameter Instruction cycle (minimum execution time) Symbol tinst Value (typical) 4/FCH, 8/FCH, 16/FCH, 64/FCH 2/FCL Unit s s Remarks (4/FCH) tinst = 1.0 s at FCH = 4 MHz tinst = 62 s at FCL = 32.768 kHz
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MB89160/160A Series
(5) Serial I/O Timing (VCC = +5.0 V 10%, AVSS = VSS = 0.0 V, TA = -40C to +85C) Parameter Serial clock cycle time SCK SO time Valid SI SCK SCK valid SI hold time Serial clock "H" pulse width Serial clock "L" pulse width SCK SO time Valid SI SCK SCK valid SI hold time Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX Pin SCK SCK, SO SI, SCK SCK, SI SCK SCK, SO SI, SCK SCK, SI External clock operation Internal clock operation Condition Value Min. 2 tinst* -200 1/2 tinst* 1/2 tinst* 1 tinst* 1 tinst* 0 1/2 tinst* 1/2 tinst* Max. -- 200 -- -- -- -- 200 -- -- Unit s ns s s s s ns s s Remarks
* : For information on tinst, see "(4) Instruction Cycle." Internal Clock Operation
tSCYC SCK 0.8 V tSLOV SO 2.4 V 0.8 V tIVSH SI 0.8 VCC 0.2 VCC tSHIX 0.8 VCC 0.2 VCC 2.4 V 0.8 V
External Clock Operation
tSLSH SCK 0.8 VCC 0.2 VCC tSLOV SO 2.4 V 0.8 V tIVSH SI 0.8 VCC 0.2 VCC tSHIX 0.8 VCC 0.2 VCC 0.2 VCC 0.8 VCC tSHSL
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MB89160/160A Series
(6) Peripheral Input Timing (VCC = +5.0 V 10%, AVSS = VSS = 0.0 V, TA = -40C to +85C) Value Pin Unit Remarks Min. Max. INT10 to INT13, EC INT20 to INT27 1 tinst* 1 tinst* 2 tinst* 2 tinst* -- -- -- -- s s s s
Parameter Peripheral input "H" pulse width 1 Peripheral input "L" pulse width 1 Peripheral input "H" pulse width 2 Peripheral input "L" pulse width 2
Symbol tILIH1 tIHIL1 tILIH2 tIHIL2
* : For information on tinst, see "(4) Instruction Cycle."
t IHIL1
t ILIH1
INT10 to 13, EC
0.2 VCC
0.8 VCC 0.2 VCC
0.8 VCC
t IHIL2
t ILIH2
INT20 to 27
0.8 VCC 0.2 VCC 0.2 VCC 0.8 VCC
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MB89160/160A Series
5. A/D Converter Electrical Characteristics
(3 MHz, AVCC = VCC = +3.5 V to +6.0 V, AVSS = VSS = 0.0 V, TA = -40C to +85C) Parameter Resolution Total error Linearity error Differential linearity error Zero transition voltage Full-scale transition voltage Interchannel disparity A/D mode conversion time Sense mode conversion time Analog port input current IAI Analog input voltage Reference voltage -- -- AVR = 5.0 V, when A/D conversion is activated AVR = 5.0 V, when A/D conversion is stopped -- AN0 to AN7 -- VOT -- VFST AVR - 3.0 LSB AVR - 1.5 LSB -- -- -- -- 0.0 2.0 -- 44 tinst 12 tinst -- -- -- AVR 0.5 -- -- 10 AVR AVCC mV LSB s s A V V A -- Symbol Pin Condition -- Value Min. -- -- -- Typ. -- -- -- Max. 8 1.5 1.0 Unit Remarks bit LSB LSB
-- -- 0.9 LSB AVR = AVCC AVSS - 1.0 LSB AVSS + 0.5 LSB AVSS + 2.0 LSB mV
IR Reference voltage supply current IRH AVR
--
100
--
--
--
1
A
(1) A/D Glossary * Resolution Analog changes that are identifiable with the A/D converter. When the number of bits is 8, analog voltage can be divided into 28=256. * Linearity error (unit: LSB) The deviation of the straight line connecting the zero transition point ("0000 0000" "0000 0001") with the full-scale transition point ("1111 1111" "1111 1110") from actual conversion characteristics * Differential linearity error (unit: LSB) The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value * Total error (unit: LSB) The difference between theoretical and actual conversion values
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MB89160/160A Series
Digital output 1111 1111 1111 1110 * * * * * * * * * * * 0000 0010 0000 0001 0000 0000 Actual conversion value Theoretical conversion value Linearity error = (1 LSB x N + VOT) 1 LSB = AVR 256 VNT - (1 LSB x N + VOT) 1 LSB V(N+1)T - VNT 1 LSB -1
Defferential linearity error =
Total error = Linearity error
VNT - (1 LSB x N + 1 LSB) 1 LSB
VOT
VNT V(N + 1)T
VFST
Analog input
(2) Precautions * Input impedance of analog input pins The A/D converter contains a sample hold circuit as illustrated below to fetch analog input voltage into the sample hold capacitor for eight instruction cycles after activating A/D conversion. For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output impedance of the external circuit low (below 10 k). Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about 0.1 F for the analog input pin. Analog Input Equivalent Circuit
Sample hold circuit . C = 33 pF . Analog input pin Comparator If the analog input impedance is higher than 10 k, it is recommended to connect an external capacitor of approx. 0.1 F. . R = 6 k . Close for 8 instruction cycles after activating A/D conversion. Analog channel selector
* Error The smaller the |AVR - AVSS|, the greater the error would become relatively.
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MB89160/160A Series
s EXAMPLE CHARACTERISTICS
(1) "L" Level Output Voltage
VOL1 vs. IOL
VOL1 (V) 0.6 TA = +25C 0.5 0.4 0.3 0.2 0.1 0 VCC = 5.0 V VCC = 6.0 V VCC = 2.5 V VCC = 2.0 V VCC = 3.0 V VCC = 4.0 V
VOL2 vs. IOL
VOL2 (V) VCC = 2.0 V 1.0 TA = +25C 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V VCC = 2.5 V VCC = 3.0 V
0
1
2
3
4
5
6
7
8
9
10 IOL (mA)
0
2
4
6
8
10
12 14
16 18
20 IOL (mA)
(2) "H" Level Output Voltage
VCC - VOH1 vs. IOH VCC - VOH1 (V) VCC = 2.0 V VCC = 2.5 V VCC = 3.0 V 1.0 TA = +25C 0.9
0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 -1 -2 -3 -4 -5 IOH (mA) VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V
VCC - VOH2 vs. IOH VCC - VOH2 (V) VCC = 2.0 V VCC = 2.5 V 1.0 TA = +25C 0.9
0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 -1 -2 -3 -4 -5 -6 -7 -8
VCC = 3.0 V
VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V
-9 -10 IOH (mA)
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MB89160/160A Series
(3) "H" Level Input Voltage/"L" level Input Voltage
CMOS input
VIN (V) 5.0 TA = +25C 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 1 2 3 4 5 6 7 VCC (V)
CMOS hysteresis input
VIN (V) 5.0 TA = +25C 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 1 2 3 4 5 6 7 VCC (V) VILS VIHS
VIHS: Threshold when input voltage in hysteresis characteristics is set to "H" level VILS: Threshold when input voltage in hysteresis characteristics is set to "L" level
(4) Power Supply Current (External Clock)
ICC1 vs. VCC (Mask ROM products) ICC1 (mA) 7 TA = +25C 6 FCH = 4.2 MHz 5 4 3 1.0 2 FCH = 1 MHz 1 0 0 FCH = 1 MHz FCH = 3 MHz FCH = 3 MHz 2.0 FCH = 4.2 MHz ICC2 (mA) TA = +25C ICC2 vs. VCC (Mask ROM products)
1
2
3
4
5
6
7 VCC (V)
1
2
3
4
5
6
7 VCC (V)
(Continued)
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MB89160/160A Series
ICC1S vs.VCC (Mask ROM products) ICC1S (mA) 3.0 TA = +25C FCH = 4.2 MHz ICC2S (mA)
ICC2S vs. VCC (Mask ROM products)
TA = +25C
2.0 2.0 FCH = 3 MHz FCH = 4.2 MHz
FCH = 3 MHz 1.0 1.0 FCH = 1 MHz FCH = 1 MHz
0
1
2
3
4
5
6
7 VCC (V)
0
1
2
3
4
5
6
7 VCC (V)
ICCL vs. VCC (Mask ROM products) ICCL (A) 200 TA = +25C 180 160 140 120 100 80 60 40 20 0 1 2 3 4 5 6 7 VCC (V) 0 1 2 10 15 FCL = 32.768 kHz 25 ICCT (A) 30
ICCT vs. VCC
TA = +25C
20
FCL = 32.768 kHz
5
3
4
5
6
7 VCC (V)
(Continued)
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MB89160/160A Series
(Continued)
ICCSL vs. VCC ICCSL (A) 200 TA = +25C 180 160 140 120 100 80 60 40 20 0 1 2 3 4 5 6 7 VCC (V) FCL = 32.768 kHz
900 800 700 FCL = 32.768 kHz 600 500 400 300 200 100 0 1 2 3 4 5 6 7 VCC (V) ICCT2 (A) 1,000 TA = +25C ICCT2 vs. VCC
IA (mA) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5
IA vs. AVCC FCH = 4 MHz TA = +25C
IR (A) 200 180 160 140 120 100 80 60 40 20 0 1.5 2 2.5 3
IR vs. AVR TA = +25C
0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 AVCC (V)
3.5
4
4.5
5
5.5
6
6.5 AVR (V)
(5) Pull-up Resistance
RPULL (k) 1,000 500 RPULL vs. VCC
100 50 TA = +85C TA = +25C TA = -40C 10 1 2 3 4 5 6 7 VCC (V)
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MB89160/160A Series
s INSTRUCTIONS
Execution instructions can be divided into the following four groups: * * * * Transfer Arithmetic operation Branch Others
Table 1 lists symbols used for notation for instructions. Table 1 Symbol dir off ext #vct #d8 #d16 dir: b rel @ A AH AL T TH TL IX Direct address (8 bits) Offset (8 bits) Extended address (16 bits) Vector table number (3 bits) Immediate data (8 bits) Immediate data (16 bits) Bit direct address (8:3 bits) Branch relative address (8 bits) Register indirect (Example: @A, @IX, @EP) Accumulator A (Whether its length is 8 or 16 bits is determined by the instruction in use.) Upper 8 bits of accumulator A (8 bits) Lower 8 bits of accumulator A (8 bits) Temporary accumulator T (Whether its length is 8 or 16 bits is determined by the instruction in use.) Upper 8 bits of temporary accumulator T (8 bits) Lower 8 bits of temporary accumulator T (8 bits) Index register IX (16 bits) Instruction Symbols Meaning
(Continued)
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MB89160/160A Series
(Continued)
Symbol EP PC SP PS dr CCR RP Ri x (x) (( x )) Extra pointer EP (16 bits) Program counter PC (16 bits) Stack pointer SP (16 bits) Program status PS (16 bits) Accumulator A or index register IX (16 bits) Condition code register CCR (8 bits) Register bank pointer RP (5 bits) General-purpose register Ri (8 bits, i = 0 to 7) Indicates that the very x is the immediate data. (Whether its length is 8 or 16 bits is determined by the instruction in use.) Indicates that the contents of x is the target of accessing. (Whether its length is 8 or 16 bits is determined by the instruction in use.) The address indicated by the contents of x is the target of accessing. (Whether its length is 8 or 16 bits is determined by the instruction in use.) Meaning
Columns indicate the following: Mnemonic: ~: #: Operation: TL, TH, AH: Assembler notation of an instruction Number of instructions Number of bytes Operation of an instruction A content change when each of the TL, TH, and AH instructions is executed. Symbols in the column indicate the following: * "-" indicates no change. * dH is the 8 upper bits of operation description data. * AL and AH must become the contents of AL and AH immediately before the instruction is executed. * 00 becomes 00. N, Z, V, C: OP code: An instruction of which the corresponding flag will change. If + is written in this column, the relevant instruction will change its corresponding flag. Code of an instruction. If an instruction is more than one code, it is written according to the following rule: Example: 48 to 4F This indicates 48, 49, ... 4F.
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MB89160/160A Series
Table 2 Mnemonic MOV dir,A MOV @IX +off,A MOV ext,A MOV @EP,A MOV Ri,A MOV A,#d8 MOV A,dir MOV A,@IX +off MOV A,ext MOV A,@A MOV A,@EP MOV A,Ri MOV dir,#d8 MOV @IX +off,#d8 MOV @EP,#d8 MOV Ri,#d8 MOVW dir,A MOVW @IX +off,A MOVW ext,A MOVW @EP,A MOVW EP,A MOVW A,#d16 MOVW A,dir MOVW A,@IX +off MOVW A,ext MOVW A,@A MOVW A,@EP MOVW A,EP MOVW EP,#d16 MOVW IX,A MOVW A,IX MOVW SP,A MOVW A,SP MOV @A,T MOVW @A,T MOVW IX,#d16 MOVW A,PS MOVW PS,A MOVW SP,#d16 SWAP SETB dir: b CLRB dir: b XCH A,T XCHW A,T XCHW A,EP XCHW A,IX XCHW A,SP MOVW A,PC ~ 3 4 4 3 3 2 3 4 4 3 3 3 4 5 4 4 4 5 5 4 2 3 4 5 5 4 4 2 3 2 2 2 2 3 4 3 2 2 3 2 4 4 2 3 3 3 3 2 # 2 2 3 1 1 2 2 2 3 1 1 1 3 3 2 2 2 2 3 1 1 3 2 2 3 1 1 1 3 1 1 1 1 1 1 3 1 1 3 1 2 2 1 1 1 1 1 1 Transfer Instructions (48 instructions) Operation (dir) (A) ( (IX) +off ) (A) (ext) (A) ( (EP) ) (A) (Ri) (A) (A) d8 (A) (dir) (A) ( (IX) +off) (A) (ext) (A) ( (A) ) (A) ( (EP) ) (A) (Ri) (dir) d8 ( (IX) +off ) d8 ( (EP) ) d8 (Ri) d8 (dir) (AH),(dir + 1) (AL) ( (IX) +off) (AH), ( (IX) +off + 1) (AL) (ext) (AH), (ext + 1) (AL) ( (EP) ) (AH),( (EP) + 1) (AL) (EP) (A) (A) d16 (AH) (dir), (AL) (dir + 1) (AH) ( (IX) +off), (AL) ( (IX) +off + 1) (AH) (ext), (AL) (ext + 1) (AH) ( (A) ), (AL) ( (A) ) + 1) (AH) ( (EP) ), (AL) ( (EP) + 1) (A) (EP) (EP) d16 (IX) (A) (A) (IX) (SP) (A) (A) (SP) ( (A) ) (T) ( (A) ) (TH),( (A) + 1) (TL) (IX) d16 (A) (PS) (PS) (A) (SP) d16 (AH) (AL) (dir): b 1 (dir): b 0 (AL) (TL) (A) (T) (A) (EP) (A) (IX) (A) (SP) (A) (PC) TL - - - - - AL AL AL AL AL AL AL - - - - - - - - - AL AL AL AL AL AL - - - - - - - - - - - - - - - AL AL - - - - TH - - - - - - - - - - - - - - - - - - - - - AH AH AH AH AH AH - - - - - - - - - - - - - - - - AH - - - - AH - - - - - - - - - - - - - - - - - - - - - dH dH dH dH dH dH dH - - dH - dH - - - dH - - AL - - - dH dH dH dH dH NZVC ---- ---- ---- ---- ---- ++-- ++-- ++-- ++-- ++-- ++-- ++-- ---- ---- ---- ---- ---- ---- ---- ---- ---- ++-- ++-- ++-- ++-- ++-- ++-- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ++++ ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- OP code 45 46 61 47 48 to 4F 04 05 06 60 92 07 08 to 0F 85 86 87 88 to 8F D5 D6 D4 D7 E3 E4 C5 C6 C4 93 C7 F3 E7 E2 F2 E1 F1 82 83 E6 70 71 E5 10 A8 to AF A0 to A7 42 43 F7 F6 F5 F0
Notes: * During byte transfer to A, T A is restricted to low bytes. * Operands in more than one operand instruction must be stored in the order in which their mnemonics are written. (Reverse arrangement of F2MC-8 family)
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MB89160/160A Series
Table 3 Mnemonic ADDC A,Ri ADDC A,#d8 ADDC A,dir ADDC A,@IX +off ADDC A,@EP ADDCW A ADDC A SUBC A,Ri SUBC A,#d8 SUBC A,dir SUBC A,@IX +off SUBC A,@EP SUBCW A SUBC A INC Ri INCW EP INCW IX INCW A DEC Ri DECW EP DECW IX DECW A MULU A DIVU A ANDW A ORW A XORW A CMP A CMPW A RORC A ROLC A CMP A,#d8 CMP A,dir CMP A,@EP CMP A,@IX +off CMP A,Ri DAA DAS XOR A XOR A,#d8 XOR A,dir XOR A,@EP XOR A,@IX +off XOR A,Ri AND A AND A,#d8 AND A,dir ~ 3 2 3 4 3 3 2 3 2 3 4 3 3 2 4 3 3 3 4 3 3 3 19 21 3 3 3 2 3 2 2 2 3 3 4 3 2 2 2 2 3 3 4 3 2 2 3 # 1 2 2 2 1 1 1 1 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 1 1 1 1 2 2 1 2 1 1 2 2 Arithmetic Operation Instructions (62 instructions) Operation (A) (A) + (Ri) + C (A) (A) + d8 + C (A) (A) + (dir) + C (A) (A) + ( (IX) +off) + C (A) (A) + ( (EP) ) + C (A) (A) + (T) + C (AL) (AL) + (TL) + C (A) (A) - (Ri) - C (A) (A) - d8 - C (A) (A) - (dir) - C (A) (A) - ( (IX) +off) - C (A) (A) - ( (EP) ) - C (A) (T) - (A) - C (AL) (TL) - (AL) - C (Ri) (Ri) + 1 (EP) (EP) + 1 (IX) (IX) + 1 (A) (A) + 1 (Ri) (Ri) - 1 (EP) (EP) - 1 (IX) (IX) - 1 (A) (A) - 1 (A) (AL) x (TL) (A) (T) / (AL),MOD (T) (A) (A) (T) (A) (A) (T) (A) (A) (T) (TL) - (AL) (T) - (A) CA C A (A) - d8 (A) - (dir) (A) - ( (EP) ) (A) - ( (IX) +off) (A) - (Ri) Decimal adjust for addition Decimal adjust for subtraction (A) (AL) (TL) (A) (AL) d8 (A) (AL) (dir) (A) (AL) ( (EP) ) (A) (AL) ( (IX) +off) (A) (AL) (Ri) (A) (AL) (TL) (A) (AL) d8 (A) (AL) (dir) TL - - - - - - - - - - - - - - - - - - - - - - - dL - - - - - - - - - - - - - - - - - - - - - - - TH - - - - - - - - - - - - - - - - - - - - - - - 00 - - - - - - - - - - - - - - - - - - - - - - - AH - - - - - dH - - - - - - dH - - - - dH - - - dH dH 00 dH dH dH - - - - - - - - - - - - - - - - - - - - NZVC ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ +++- ---- ---- ++-- +++- ---- ---- ++-- ---- ---- ++R- ++R- ++R- ++++ ++++ ++-+ ++-+ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- OP code 28 to 2F 24 25 26 27 23 22 38 to 3F 34 35 36 37 33 32 C8 to CF C3 C2 C0 D8 to DF D3 D2 D0 01 11 63 73 53 12 13 03 02 14 15 17 16 18 to 1F 84 94 52 54 55 57 56 58 to 5F 62 64 65
(Continued)
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MB89160/160A Series
(Continued)
Mnemonic AND A,@EP AND A,@IX +off AND A,Ri OR A OR A,#d8 OR A,dir OR A,@EP OR A,@IX +off OR A,Ri CMP dir,#d8 CMP @EP,#d8 CMP @IX +off,#d8 CMP Ri,#d8 INCW SP DECW SP ~ 3 4 3 2 2 3 3 4 3 5 4 5 4 3 3 # 1 2 1 1 2 2 1 2 1 3 2 3 2 1 1 Operation (A) (AL) ( (EP) ) (A) (AL) ( (IX) +off) (A) (AL) (Ri) (A) (AL) (TL) (A) (AL) d8 (A) (AL) (dir) (A) (AL) ( (EP) ) (A) (AL) ( (IX) +off) (A) (AL) (Ri) (dir) - d8 ( (EP) ) - d8 ( (IX) + off) - d8 (Ri) - d8 (SP) (SP) + 1 (SP) (SP) - 1 Table 4 Mnemonic BZ/BEQ rel BNZ/BNE rel BC/BLO rel BNC/BHS rel BN rel BP rel BLT rel BGE rel BBC dir: b,rel BBS dir: b,rel JMP @A JMP ext CALLV #vct CALL ext XCHW A,PC RET RETI ~ 3 3 3 3 3 3 3 3 5 5 2 3 6 6 3 4 6 # 2 2 2 2 2 2 2 2 3 3 1 3 1 3 1 1 1 TL - - - - - - - - - - - - - - - TH - - - - - - - - - - - - - - - AH - - - - - - - - - - - - - - - NZVC ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++++ ++++ ++++ ++++ ---- ---- OP code 67 66 68 to 6F 72 74 75 77 76 78 to 7F 95 97 96 98 to 9F C1 D1
Branch Instructions (17 instructions) Operation TL - - - - - - - - - - - - - - - - - TH - - - - - - - - - - - - - - - - - AH - - - - - - - - - - - - - - dH - - NZVC ---- ---- ---- ---- ---- ---- ---- ---- -+-- -+-- ---- ---- ---- ---- ---- ---- Restore OP code FD FC F9 F8 FB FA FF FE B0 to B7 B8 to BF E0 21 E8 to EF 31 F4 20 30
If Z = 1 then PC PC + rel If Z = 0 then PC PC + rel If C = 1 then PC PC + rel If C = 0 then PC PC + rel If N = 1 then PC PC + rel If N = 0 then PC PC + rel If V N = 1 then PC PC + rel If V N = 0 then PC PC + reI If (dir: b) = 0 then PC PC + rel If (dir: b) = 1 then PC PC + rel (PC) (A) (PC) ext Vector call Subroutine call (PC) (A),(A) (PC) + 1 Return from subrountine Return form interrupt Table 5
Other Instructions (9 instructions) Operation TL - - - - - - - - - TH - - - - - - - - - AH - dH - - - - - - - NZVC ---- ---- ---- ---- ---- ---R ---S ---- ---- OP code 40 50 41 51 00 81 91 80 90
Mnemonic PUSHW A POPW A PUSHW IX POPW IX NOP CLRC SETC CLRI SETI
~ 4 4 4 4 1 1 1 1 1
# 1 1 1 1 1 1 1 1 1
51
52
4 PUSHW A SETC CLRB BBC INCW DECW MOVW MOVW dir: 1 dir: 1,rel SP SP SP,A A,SP A A,ext POPW MOV MOVW CLRI A,PS SETI CLRB BBC INCW DECW JMP MOVW dir: 0 dir: 0,rel A A @A A,PC 5 6 7 8 9 A B C D E F XCH A A XOR AND OR DAA A,#d8 A,#d8 A,#d8 DAS XCHW XORW ANDW ORW A, T A A A A, T A A A XOR AND OR MOV MOV CLRB BBC INCW DECW MOVW MOVW @A,T A,@A dir: 2 dir: 2,rel IX IX IX,A A,IX MOVW MOVW CLRB BBC INCW DECW MOVW MOVW @A,T A,@A dir: 3 dir: 3,rel EP EP EP,A A,EP CLRB BBC MOVW MOVW MOVW XCHW dir: 4 dir: 4,rel A,ext ext,A A,#d16 A,PC
L
H
0
1
2
3
0
NOP
SWAP
RET
RETI
1
MULU
DIVU
A
A
JMP CALL PUSHW POPW MOV MOVW CLRC addr16 addr16 IX IX ext,A PS,A
2
ROLC
CMP
ADDC
SUBC
A
A
A
s INSTRUCTION MAP
3
RORC
CMPW
ADDCW
SUBCW
A
A
A
4
MOV CMP ADDC SUBC A,#d8 A,#d8 A,#d8 A,#d8
5
MOV
CMP
MB89160/160A Series
A,dir
A,dir
ADDC SUBC MOV XOR AND OR MOV CMP CLRB BBC MOVW MOVW MOVW XCHW A,dir A,dir dir,A A,dir A,dir A,dir dir,#d8 dir,#d8 dir: 5 dir: 5,rel A,dir dir,A SP,#d16 A,SP
6 CMP @EP,#d8
CMP CLRB BBC MOVW MOVW MOVW XCHW MOV CMP ADDC SUBC MOV XOR AND OR MOV dir: 6 dir: 6,rel A,@IX +d @IX +d,A IX,#d16 A,IX A,@IX +d A,@IX +d A,@IX +d A,@IX +d @IX +d,A A,@IX +d A,@IX +d A,@IX +d @IX +d,#d8 @IX +d,#d8 CLRB BBC MOVW MOVW MOVW XCHW dir: 7 dir: 7,rel A,@EP @EP,A EP,#d16 A,EP DEC R0 DEC R1 DEC R2 DEC R3 DEC R4 DEC R5 DEC R6 DEC R7 R7 R6 CALLV #7 R5 CALLV #6 BLT rel R4 CALLV #5 BGE rel R3 CALLV #4 BZ rel R2 CALLV #3 BNZ rel R1 CALLV #2 BN rel R0 CALLV #1 BP rel CALLV #0 BC rel BNC rel
7
MOV CMP ADDC SUBC MOV XOR AND OR MOV A,@EP A,@EP A,@EP A,@EP @EP,A A,@EP A,@EP A,@EP @EP,#d8
8
MOV
CMP
A,R0
A,R0
ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R0 A,R0 R0,A A,R0 A,R0 A,R0 R0,#d8 R0,#d8 dir: 0 dir: 0,rel
9
MOV
CMP
A,R1
A,R1
ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R1 A,R1 R1,A A,R1 A,R1 A,R1 R1,#d8 R1,#d8 dir: 1 dir: 1,rel
A
MOV
CMP
A,R2
A,R2
ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R2 A,R2 R2,A A,R2 A,R2 A,R2 R2,#d8 R2,#d8 dir: 2 dir: 2,rel
B
MOV
CMP
A,R3
A,R3
ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R3 A,R3 R3,A A,R3 A,R3 A,R3 R3,#d8 R3,#d8 dir: 3 dir: 3,rel
C
MOV
CMP
A,R4
A,R4
ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R4 A,R4 R4,A A,R4 A,R4 A,R4 R4,#d8 R4,#d8 dir: 4 dir: 4,rel
D
MOV
CMP
A,R5
A,R5
ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R5 A,R5 R5,A A,R5 A,R5 A,R5 R5,#d8 R5,#d8 dir: 5 dir: 5,rel
E
MOV
CMP
A,R6
A,R6
ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R6 A,R6 R6,A A,R6 A,R6 A,R6 R6,#d8 R6,#d8 dir: 6 dir: 6,rel
F
MOV
CMP
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A,R7
A,R7
ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC A,R7 A,R7 R7,A A,R7 A,R7 A,R7 R7,#d8 R7,#d8 dir: 7 dir: 7,rel
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MB89160/160A Series
s MASK OPTIONS
Part number Specifying procedure Pull-up resistors (SEG) P00 to P07, P10 to P17, P20 to P27, P40 to P47, P50 to P57, P60 to P67 MB89161/3/5 Specify when ordering masking Slectable per pin (The pull-up resistors for P40 to P47 and P60 to P67 are only selectable when these pins are not set as segment outputs. When the A/D is used, P50 to P57 are must not selected.) Selectable MB89P165 Set with EPROM programmer Can be set per pin (P20 to P27, P40 to P47, and P60 to P67 are available only for without a pull-up resistor.) MB89PV160 Setting not possible
Fixed to without pull-up resistor
Power-on reset (POR) With power-on reset Without power-on reset
Selectable
Fixed to with poweron reset
Selection of oscillation stabilization Selectable time (OSC) OSC * The initial value of the oscillation 0 : 22/FCH stabilization time for the main clock 1 : 212/FCH can be set by selecting the values of 2 : 216/FCH the WTM1 and WTM0 bits on the 3 : 218/FCH right. Main clock oscillation type (XSL) Crystal or ceramic resonator CR Reset pin output (RST) With reset output Without reset output Clock mode selection (CLK) Dual-clock mode Single-clock mode Selectable
Selectable WTM1 WTM0 Fixed to oscillation 0 0 : 22/FCH 12/FCH stabilization time of 0 1 :2 216/FCH 1 0 : 216/FCH 1 1 : 218/FCH Fixed to crystal or ceramic Fixed to with reset output Fixed to dual-clock mode
Crystal or ceramic only
Selectable
Selectable
Selectable
Selectable
53
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MB89160/160A Series
* Segment Options Part number No. 7 Specifying procedure LCD output pin configuration choices SEG = 4: P40 to P47 segment output P60 to P67 segment output P70, P71 common output SEG = 3: P40 to P43 segment output P44 to P47 port output P60 to P67 segment output P70, P71 common output SEG = 2: P40 to P47 port output P60 to P67 segment output P70, P71 common output SEG = 1: P40 to P47 port output P60 to P63 segment output P64 to P67 port output P70, P71 port output SEG = 0: P40 to P47 port output P60 to P67 port output P70, P71 port output MB89161/3/5 Specify when ordering masking Specify by the option combinations listed below Specify as SEG = 4 -101 : SEG 24 pins -201 COM 4 pins -101 : SEG 24 pins COM 4 pins MB89P165 Select by version number MB89PV160 Select by version number
Specify as SEG = 3
-102 : SEG 20 pins -202 COM 4 pins
-102 : SEG 20 pins COM 4 pins
Specify as SEG = 2
-103 : SEG 16 pins -203 COM 4 pins
-103 : SEG 16 pins COM 4 pins
Specify as SEG = 1
-104 : SEG 12 pins COM 2 pins
-104 : SEG 12 pins COM 2 pins
Specify as SEG = 0
-105 : SEG 8 pins COM 2 pins
-105 : SEG 8 pins COM 2 pins
s VERSIONS
Version Mass production product MB89160A series One-time PROM product MB89P165-201 -202 -203 MB89P165-101 -102 -103 -104 -105 Piggyback/evaluation product -- MB89PV160-101 -102 -103 -104 -105 Features Number of segment Booster pins 24 (4 commons) 20 (4 commons) 16 (4 commons) 24 (4 commons) 20 (4 commons) 16 (4 commons) 12 (2 commons) 8 (2 commons) Yes
MB89160 series
No
54
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MB89160/160A Series
s ORDERING INFORMATION
Part number MB89161-PFV MB89161A-PFV MB89163-PFV MB89163A-PFV MB89165-PFV MB89165A-PFV MB89P165-xxx-PFV MB89161-PF MB89161A-PF MB89163-PF MB89163A-PF MB89165-PF MB89165A-PF MB89P165-xxx-PF MB89161-PFS MB89161A-PFS MB89163-PFS MB89163A-PFS MB89165-PFS MB89165A-PFS MB89P165-xxx-PFS MB89W165-xxx-PF MB89PV160-xxx-PF Package Remarks
80-pin Plastic SQFP (FPT-80P-M05)
80-pin Plastic QFP (FPT-80P-M06)
80-pin Plastic QFP (FPT-80P-M11)
80-pin Ceramic QFP (FPT-80C-A02) 80-pin Ceramic MQFP (MQP-80C-P01)
Note: For information on xxx, see section "s Versions."
55
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MB89160/160A Series
s PACKAGE DIMENSIONS
80-pin Plastic SQFP (FPT-80P-M05)
14.000.20(.551.008)SQ
60
12.000.10(.472.004)SQ
1.50 -0.10 +.008 .059 -.004
41
+0.20
(Mounting
61
40
9.50 (.374) REF INDEX
80 21
13.00 (.512) NOM
LEAD No.
1
20
"A" 0.127 -0.02 +.002 .005 -.001
+0.05
Details of "A" part
0.500.08 (.0197.0031)
0.18 -0.03 +.003 .007 -.001
+0.08
0.100.10 (STAND OFF) (.004.004)
0.500.20(.020.008) 0.10(.004) 0 10
C
1994 FUJITSU LIMITED F80008S-2C-4
Dimensions in mm (inches)
80-pin Plastic QFP (FPT-80P-M06)
23.900.40(.941.016)
64 65
20.000.20(.787.008)
41 40
3.35(.132)MAX 0.05(.002)MIN (STAND OFF)
(Mounting
14.000.20 (.551.008)
INDEX
80 25
17.900.40 (.705.016)
12.00(.472) REF
16.300.40 (.642.016)
"A" LEAD No.
1 24
0.80(.0315)TYP
0.350.10 (.014.004)
0.16(.006)
M
0.150.05(.006.002)
Details of "A" part 0.25(.010) "B" 0.10(.004) 18.40(.724)REF 22.300.40(.878.016) 0.30(.012) 0.18(.007)MAX 0.58(.023)MAX
Details of "B" part
0 10 0.800.20 (.031.008)
C
1994 FUJITSU LIMITED F80010S-3C-2
Dimensions in mm (inches)
56
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MB89160/160A Series
80 pin, Plastic LQFP (FPT-80P-M11)
16.000.20(.630.008)SQ
60
14.000.10(.551.004)SQ
41
1.50 -0.10 +.008 .059 -.004
+0.20
(Mounting height)
61
40
12.35 (.486) REF
15.00 (.591) NOM
1 PIN INDEX
80 21
LEAD No.
1 20
"A" 0.300.10 (.012.004) 0.13(.005)
M
Details of "A" part 0.127 .005
+0.05 -0.02 +.002 -.001
0.65(.0256)TYP
0.100.10 (STAND OFF) (.004.004)
0.10(.004)
0
10
0.500.20 (.020.008)
C
1995 FUJITSU LIMITED F80016S-1C-3
Dimensions in mm (inches).
80-pin Ceramic QFP (FPT-80C-A02)
0.51(.020) TYP
8.50(.335)TYP
12.00(.472) REF
17.91(.705) TYP 16.00(.630) 14.000.25 TYP (.551.010)
16.31(.642) TYP
INDEX AREA 0.800.10 0.35 -0.07 (.0315.0040) (.014.003) 18.40(.725) REF 20.000.25 (.787.010) 23.90(.941) TYP 22.00(.866) TYP
+0.08
0.800.10 (.0315.0040)
0.150.05 (.006.002) 1.60(.063) TYP 4.45(.175)MAX
22.30(.878) TYP
0.80(.0315) TYP
C
1994 FUJITSU LIMITED F80014SC-1-2
Dimensions in mm (inches) 57
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MB89160/160A Series
80-pin Ceramic MQFP (MQP-80C-P01)
18.70(.736)TYP 12.00(.472)TYP 16.300.33 (.642.013) 15.580.20 (.613.008) 1.50(.059)TYP 1.00(.040)TYP 4.50(.177) TYP 1.20 -0.20 +.016 .047 -.008
+0.40
INDEX AREA
0.800.25 (.0315.010) 0.800.25 (.0315.010)
1.270.13 (.050.005) 22.300.33 (.878.013) 24.70(.972) TYP 0.30(.012) TYP 18.120.20 12.02(.473) (.713.008) TYP 10.16(.400) 14.22(.560) TYP TYP
INDEX AREA 18.40(.724) REF
INDEX 6.00(.236) TYP 0.30(.012)TYP 7.62(.300)TYP 9.48(.373)TYP 11.68(.460)TYP 0.400.10 (.016.004) 1.50(.059) TYP 1.00(.040) TYP
1.270.13 (.050.005)
0.400.10 (.016.004)
1.20 -0.20 +.016 .047 -.008
+0.40
0.150.05 8.70(.343) (.006.002) MAX
C
1994 FUJITSU LIMITED M80001SC-4-2
Dimensions in mm (inches)
58
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FUJITSU LIMITED
For further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-88, Japan Tel: (044) 754-3763 Fax: (044) 754-3329 North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 432-9044/9045 Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LIMITED #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.
F9703 (c) FUJITSU LIMITED Printed in Japan
24

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